Power semiconductor devices, e.g., metal-oxide-semiconductor field effect transistors (“MOSFETs), insulated gate bipolar transistors (“IGBTs”), or diodes, include semiconductor dice, which are cut from a wafer. Large active areas are needed in order to conduct high currents, e.g., 1 ampere or more. As a result, the main current flow is directed vertically from one main surface (top surface) to an opposing main surface (bottom surface).
FIG. 1 illustrates a conventional diode 50 including a highly-doped, low resistivity substrate 10 and a lightly-doped, high resistivity layer 11 deposited on the substrate 10. The layer 11 is generally formed using an epitaxial growth method and is commonly referred to as an “epi-layer”. The epi-layer 11 is generally also referred to as an n− layer since it is generally an n type and is lightly doped. The substrate 10, depending on the desired device type, is either n+ or p+ doped. The diode includes an anode 22 provided on a top surface 23 and a cathode 24 provided on a bottom surface 25. The anode and cathode are generally metal, e.g., aluminum. A plurality of guard rings 26 and a channel stopper 28 are formed on the top surface to reduce electrical fields on the top surface and provided a desired blocking voltage rating for the die. A passivation layer 13 covers the top surface to protect the diode. A current 30 flows from a p-doped region 32 coupling the anode to the cathode.
FIG. 2 illustrates a conventional IGBT 60 including a highly-doped, low resistivity substrate 10′, a buffer n+ layer 10B deposited on the substrate, and a lightly-doped, high resistivity layer 11′ deposited on the buffer layer. The substrate is p+ substrate. The layer 11′ is generally formed using an epitaxial growth method and is commonly referred to as an “epi-layer”. The IGBT includes a gate 62 and an source (emitter) 64 provided on a top surface 23′ and a drain (collector) 24′ provided on a bottom surface 25′. A plurality of guard rings 26′ and a channel stopper 28′ are formed on the top surface to reduce electrical fields on the top surface. A passivation layer 13′ is formed overlying the top surface to protect the IGBT. A current 30′ flows from the drain 24′ to p-wells 66 coupled to the gate and emitter.
For n channel epitaxial diodes (or MOSFETs), the substrate is n+. For n channel IGBT, the substrate is p+. The cathode 24 or drain 24′ provided on the backside of the die has an unpatterned metal contact across its surface. The metal on the top surface is patterned to form, for example, the anode in case of a the diode, or the source and gate in case of a MOSFET or IGBT.
The dice above are packaged into power devices using encapsulant or plastic. The size of the packaged power device is bigger than it could otherwise be since the electrodes (e.g., the anode 22 or the gate 64) provided on the top surface is wire bonded to leads, which requires added height and width to the package since the wires extend upwardly and outwardly from the gate and source regions.